Intel Corporation, Hillsboro, Oregon
Software Engineering Intern, May 2022-Aug 2022
Debugged DDR5/LPDDR5 chip architecture and power management in mobile and desktop processors.
Developed program to read and decode DRAM (DDR5/LPDDR5) registers using the JEDEC standard
Hands on hardware validation and programming of DRAM on future client platforms.
Cornell University Department of Computer Science, Ithaca, NY
Teaching Assistant, Aug 2021-Dec 2021
CS2112 Honors Object Oriented Design and Data Structures.
Instructed students on fundamental OOP design and data structures concepts.
Conducted office hours and graded assignments.
Multicore System: Developed a simple multicore system based on the RISC-V architecture in Verilog. Implemented a multiplier, processor, cache, and ring network. Tested system performance on a multi-threaded quicksort algorithm.
Ciphers and Encryption: Created an encryption system including alphabetic substitution ciphers and RSA public-key encryption.
Artificial Life Simulator: Programmed a graphic simulation of interacting “critters” that evolve over time and attack other species.
Handwriting Recognition Neural Network: Built and trained an artificial neural network to recognize handwritten numbers, utilizing the MNIST digits dataset
ACTIVITIES AND AWARDS
Cornell University Low Rise Community, Resident Advisor: Aug 2022-Present
The Cornell Daily News: Web Department, Feb 2021-Present
Women in Computing at Cornell: Technical Committee, 2021-2022
Certified Piano Instructor: Oregon Music Teachers Association Level 10
National Le Grand Concours: Placed 10th in the US, June 2017